VLSI course

We are conducting a basic VLSI course. Around 16 participants from in and around Auroville are coming in to learn. We are only focusing on Digital layout and understanding basic concepts.

Course outline:

Day 1:

Give an introduction to CMOS technology and fabrication process. Give an intro to CMOS Transistors and it’s working. Introduce people to stick diagrams.

• Introduction to VLSI technology.
• Introduction on CMOS transistors and working.
• Demo on LT spice simulation tool.
• Introduced CMOS Inverter and ask participants to simulate an inverter in LT spice.
• Showed a video on fabrication process and manufacturing a chip.
• Introduced stick diagram and how it helps to get started with layout. Participants drew a stick diagram for an Inverter.

Day 2:

• Introduced magic layout tool.
• Helped them to login to our central server through VNC. This helped them to avoid installing magic in their laptops. We haven’t figured out a way to install in windows so far, but Magic sort of works fine in Ubuntu platform.
• Showed top view and cross section of a CMOS transistor. This helped them to understand the fact that layout is all about top view of the devices.
• Participants laid out an invereter using magic.
• Once that was completed we showed them to extract and create a netlist. Netlist helps us to understand the connection and cross check whether the layout we laid out is correct or not.

Day 3:

• Introduced NAND gate
• Laying out NAND gate. (Note: We gave a circuit diagram for a NAND gate)
• Extracting NET list and with the same netlsit draw the schematic usind the netlist.
• Whoever completes should layout a NOR gate and repeat STEP 2 and 3.

Day 4:

• Introduced to gates. (OR, AND, INVERETER, NAND, NOR and EXOR)
• Understand the truth table for all gates.
• Introduced few rules like Involution law, Idempotency law and De Morgan’s law
• Task 1: Using NAND gate create OR, AND, INVERETER and EXOR. Draw schematic and derive the logic for the same.
• Task 2: Build those gates using DM74S00N and bread board and test whether their logic were appropriate.

Day 5:

• Intorduced Hierarchy. Showed how to import models that can be used to create complex layouts.
• Task: Layout an XOR gate importing the NAND gate built in the previous classes

Day 6:

• Introduced IRSIM
• Task 1: Test different layouts with IRSIM
• Task 2: Whoever didn’t complete XOR should complete XOR and test it out using IRSIM

Day 7:

We wanted people to see a real layout and at the end of the course, layout a micro processor.

• Showed them a layout of a real chip.
• There are three main blocks necessary for a micro processor. ALU unit, Memory and Counter. We used full adder for ALU and Flip flops for every bit for a memory and counter.
• Task: Layout a micro processor